Coded data generation or conversion – Converter compensation
Reexamination Certificate
2006-01-10
2006-01-10
Nguyen, John B (Department: 2819)
Coded data generation or conversion
Converter compensation
C341S156000
Reexamination Certificate
active
06985097
ABSTRACT:
An error correction circuit and a folding ADC are provided. In the folding ADC, the range of the input voltage to an upper ADC circuit and to a lower ADC circuit is shifted by a predetermined voltage toward higher and lower electric potential sides. The error correction circuit outputs the conversion result of the upper bits as is, or corrects the conversion result of the upper bits by either subtracting or adding 1 from or to the conversion result of the upper bits in accordance with the least significant bit within the conversion result of the upper bits and in accordance with the polarity of a code having different polarities between a period in which the voltage level of one folding signal among a plurality of folding signals output from the folding circuit is higher than the center level and a period in which the voltage level is lower.
REFERENCES:
patent: 5568149 (1996-10-01), Franson
patent: 6069579 (2000-05-01), Ito et al.
patent: 6480133 (2002-11-01), Kobayashi et al.
Ogasawara Hiroshi
Takada Masatoshi
Ueno Masayuki
Kawasaki Microelectronics Inc.
Nguyen John B
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