Error correction circuit

Details Error correction circuit Error correction circuit

1988-01-28

1990-02-06

Smith, Jerry

Excavating

G06F 1110

Patent

active

048993417

ABSTRACT:
An error correction circuit comprises a plurality of Galois body operation units coupled in cascade through a bus but operated in parallel. Each of the units includes a Galois body multiplication circuit, a Galois body addition circuit and a plurality of registers, thereby generating and decoding a BCH code.

REFERENCES:
patent: 4498175 (1985-02-01), Nagumo
patent: 4538270 (1985-08-01), Goodrich
patent: 4665523 (1987-05-01), Citron
H. Shao et al., "A VLSI Design of a Pipeline Roed--Solomon Decoder", IEEE 5/1985, pp. 393-402.

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