Error correction apparatus for digital data

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371 39, G06F 1100

Patent

active

047962615

ABSTRACT:
An error correcting system in which received digital data is subjected to correcting processes by first and second error correction codes alternately is provided with memories to store first and second series error pointers for a plurality of series of the first and second error correction codes, and such first and second series error pointers are read to determine which series are without error, whereupon the correcting processes of the first and second error correction codes are omitted with respect to the error-free series. As a result, the number of times effective correcting processes can be repeated within a limited time is increased and the correcting capability can be substantially improved.

REFERENCES:
patent: 4546474 (1985-10-01), Sako
patent: 4562578 (1985-12-01), Odaka
patent: 4637021 (1987-01-01), Shenton
patent: 4646170 (1987-02-01), Kobayashi
patent: 4646301 (1987-02-01), Okamoto
patent: 4706250 (1987-11-01), Patel

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