Error correction and concurrent verification of a product code

Details Error correction and concurrent verification of a product code Error correction and concurrent verification of a product code

1997-04-23

2000-04-11

Ganney, Vincent P.

Excavating

G06F 1100

Patent

active

060480904

ABSTRACT:
A multi-layered error detection and correction (EDAC) system is disclosed for processing an error correction code (ECC) typically employed in optical disk storage devices. A first layer of the EDAC system includes a primary ECC, such as a multiple burst Reed-Solomon code, and a second layer incudes a secondary ECC, such as a CRC code, for use in verifying the validity of the corrections made using the primary ECC. The primary ECC is multi-dimensional and, in the embodiment disclosed herein, it is a two-dimensional P/Q product code typically employed in a CD-ROM storage device. The secondary ECC operates in unison with the primary ECC. As the EDAC system processes and corrects the data using the primary ECC, the EDAC system also simultaneously updates the secondary ECC. In this manner, when the EDAC system is finished processing the data using the primary ECC, the validation syndrome generated by the secondary ECC is available immediately for checking the validity of the corrections. Consequently, the additional pass otherwise required when no uncorrectable errors are encountered after completing a P or Q pass is obviated. To significantly increase the processing of the EDAC system, error-free code words are skipped during the iterative passes of the multi-dimensional primary ECC. When a code word is skipped, the validation syndrome generated using the secondary ECC is adjusted to account for the skipped data bytes.

REFERENCES:
patent: 5408477 (1995-04-01), Okada et al.
patent: 5412667 (1995-05-01), Havemose
patent: 5563897 (1996-10-01), Pyndiah et al.
patent: 5592498 (1997-01-01), Zook

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