Error correcting system for serial by byte data

Details Error correcting system for serial by byte data Error correcting system for serial by byte data

1978-06-30

1980-01-22

Malzahn, David H.

Communications: electrical

Digital comparator systems

G06F 1110, G06F 1112

Patent

active

041852699

ABSTRACT:
A system is disclosed for generating a plurality of error correcting check ECC bytes from a block of data presented to the system in serial by byte form. The system employs a plurality of ECC channels which operate in parallel with the channels generating check bytes from interleaved subsets of the data block. One channel generates an ECC parity check byte for each interleaved subset while another channel generates an ECC locator check byte for each interleaved subset of data. The ECC locator check byte for each subset represents the parity or modulo 2 sum of bit positions which are selected systematically in accordance with a predefined m sequence which is unique to each channel that generates locator check bytes. Error patterns greater than the number of bits in one byte are correctable, as are error patterns which are less than the number of bits in one byte but extend across byte boundaries of two adjacent bytes in different subsets.

REFERENCES:
patent: 3163848 (1964-12-01), Abramson
patent: 3478313 (1969-11-01), Srinivasan
patent: 3725859 (1973-04-01), Blair et al.
patent: 3745526 (1973-07-01), Hong et al.
patent: 3825893 (1974-07-01), Bossen et al.
patent: 3913068 (1975-10-01), Patel
Stojko et al., "Error-Correction Code," IBM Tech. Disclosure Bulletin, vol. 10, No. 10, Mar. 1968, pp. 1437-1438.
Bossen, "Adjacent Error Correction, IBM Journal of Research Development, Jul. 1970, pp. 402-408.

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