Error correcting system

Details Error correcting system Error correcting system

1982-09-30

1985-02-05

Smith, Jerry

Excavating

G06F 1110

Patent

active

044981759

ABSTRACT:
An error correcting system uses an error location polynomial which is defined by double correction BCH codes each consisting of the elements of a Galois field GF(2.sup.m), and thereby generates error locations .sigma..sub.1 and .alpha..sup.2 and error patterns e.sub.1 and 2.sub.2. The system has a first data processing system for performing only addition and multiplication to generate the error locations .sigma..sub.1 and .alpha..sup.2, and a second data processing system for performing only addition and multiplication to generate the error patterns e.sub.1 and 2.sub.2. The first data processing system comprises a syndrome generator, a memory, an arithmetic logic unit, registers, latch circuits, registers, adder circuits and a zero detector. The second data processing system comprises a gate circuit, latch circuits, an arithmetic logic unit, and the registers of a memory.

REFERENCES:
patent: 4142174 (1979-02-01), Chen et al.
patent: 4413339 (1983-11-01), Riggle et al.
patent: 4413340 (1983-11-01), Odaka et al.
patent: 4437185 (1984-03-01), Sako et al.

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