Error-correcting modem

Excavating

Patent

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Details

371 35, 375116, H04L 100, G08C 2500

Patent

active

047260297

ABSTRACT:
Error multiplication in the differential decoder and descrambler of V.22 bis modems is avoided by replacing the differential coding with forward error correction and single symbol coding. The error syndrome bit of the error corrector is used in establishing phase and timing synchronization by causing the receiver to try all possible combinations of phase and timing, and to lock onto the combination which produces a minimum of error syndrome bits. The descrambler receives the error-free corrected bit stream, whereby the descrambler's inherent error multiplication becomes moot.

REFERENCES:
patent: 3585586 (1971-06-01), Harmon
patent: 3789359 (1974-01-01), Clark
patent: 3893072 (1985-07-01), D'Antonio
patent: 3988539 (1975-10-01), Motley
patent: 4383322 (1983-05-01), Halpern
patent: 4507779 (1985-03-01), Barner
patent: 4539684 (1985-09-01), Kloker
patent: 4586182 (1986-04-01), Gallager
patent: 4603413 (1986-07-01), Sinjou
patent: 4646305 (1987-02-01), Tretter

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