Error correcting and controlling system

Communications: electrical – Digital comparator systems

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G08C 2500, G06F 1112

Patent

active

041076524

ABSTRACT:
An error correcting and controlling system having syndrome generating means for generating syndromes of data to be checked and memory means for storing error bit positions in which system the syndromes form addressing inputs to the memory so that the error bit position information stored in the address positions corresponding to each syndrome in the memory may be read out and processed for the purposes of error detection and correction. As a result, the check circuits of the present system have been simplified as compared with conventional check circuits.

REFERENCES:
patent: 3478313 (1969-11-01), Srinivasan
patent: 3562709 (1971-02-01), Srinivasan
patent: 3983536 (1976-09-01), Telfer
patent: 4030067 (1977-06-01), Howell et al.

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