Error controller for use in debugging microprocessor

Details Error controller for use in debugging microprocessor Error controller for use in debugging microprocessor

1990-12-04

1993-10-26

Beausoliel, Jr., Robert W.

Excavating

371 19, 395575, G06F 1100

Patent

active

052572692

ABSTRACT:
An error controller for use in a debugging microprocessor includes a bus error detection circuit for generating an exception request signal when an external bus error signal is supplied through an external input terminal and an exception control circuit responding to the exception request signal so as to control an exception processing. A double bus error detection circuit receives the external bus error signal for stopping an operation of a microprocessor when the external bus error signal is detected in the way of the exception processing. A bus error status saving circuit is provided for controlling the bus error detection circuit so as to save, when an interrupt request is given through a debug interrupt request terminal, a bus error status held in the bus error detection circuit indicating that the exception processing for the bus error is being executed when the interrupt request is given, so that the bus error detection circuit is brought into a condition of no bus error. The bus error status saving circuit operates to return the saved bus error status to the bus error detection circuit at the time of returning from the interrupt.

REFERENCES:
patent: 4514845 (1985-04-01), Starr
patent: 4819234 (1989-04-01), Huber
patent: 4881228 (1989-10-01), Shouda

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