Communications: electrical – Digital comparator systems
Patent
1975-08-01
1977-07-12
Dildine, Jr., R. Stephen
Communications: electrical
Digital comparator systems
235153AM, G06F 1110, G11C 2900, H04L 110
Patent
active
040357660
ABSTRACT:
The error-checking scheme disclosed herein is adapted for use in digital data processing systems, e.g. computers, in which binary data is variously transmitted and/or stored and in which the data source or destination is designated by a binary address. In a preferred embodiment, the data is divided into two fields and a respective parity bit is generated corresponding to each data field. Each data parity bit is then combined with a parity bit corresponding to the binary address to yield a respective combinational parity bit. Each of the resultant combinational parity bits is then sourced with the respective data field. Accordingly, a system sub-component receiving the sourced data with the combinational parity bits can detect any type of single error occurring in either the address or the data.
REFERENCES:
patent: 3789204 (1974-01-01), Barlow
Bolt Beranek and Newman Inc.
Dildine, Jr. R. Stephen
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