Erase verify for memory devices

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185180, C365S185220, C365S185290

Reexamination Certificate

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07864583

ABSTRACT:
Various embodiments include memory devices and methods having first memory cells and second memory cells coupled to the first memory cells in a string arrangement, first word lines configured to apply a first voltage to gates of the first memory cells during a verify operation of the first memory cells, and second word lines configured to apply a second voltage to gates of the second memory cells during the verify operation.

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“U.S. Appl. No. 11/619,978, Notice of Allowance mailed Apr. 10, 2008”, 5 pgs.

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