Erase pin protection in EEPROM using active snapback ESD...

Details Erase pin protection in EEPROM using active snapback ESD... Erase pin protection in EEPROM using active snapback ESD...

2011-01-18

2011-01-18

Jackson, Stephen W (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

Reexamination Certificate

active

07872840

ABSTRACT:
In an ESD protection circuit for an EEPROM erase pin a snapback device is provided for discharging high ESD currents, whereas the snapback device is operated in active mode during low voltage electrical overstress and to discharge post ESD event current by connecting an RC circuit over the control electrode of the snapback device. In order to handle high voltage normal operating conditions the snapback device is deactivated once VDD is applied by pulling the control electrode to ground using a VDD controlled switch.

REFERENCES:
patent: 6055183 (2000-04-01), Ho et al.
patent: 6078487 (2000-06-01), Partovi et al.
patent: 6970335 (2005-11-01), Vashchenko et al.
patent: 7027277 (2006-04-01), Vashchenko et al.

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