Erasable electrically programmable read only memory cell using t

Details Erasable electrically programmable read only memory cell using t Erasable electrically programmable read only memory cell using t

1986-06-02

1989-01-03

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

357 235, 357 41, G11C 1134, H01L 2978, H01L 2702

Patent

active

047962283

ABSTRACT:
An electrically programmable read only memory cell formed in a face of a semiconductor substrate which includes a floating gate transistor having a floating gate and a control gate formed at least partially in a trench in the substrate. The trench has bottom corners sufficiently sharp so as to enhance the likelihood of tunnelling between corner regions of the trench and the floating gate over that between planar surface regions of the trench and floating gate.

REFERENCES:
patent: 4209849 (1980-06-01), Schrenk
patent: 4668970 (1985-12-01), Yatsuda et al.
patent: 4695979 (1987-09-01), Tuvell et al.
patent: 4698900 (1987-10-01), Esquivel

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