Equilibrium based vertical sync phase lock loop for video...

Television – Synchronization – Automatic phase or frequency control

Reexamination Certificate

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Details

C348S529000

Reexamination Certificate

active

10713714

ABSTRACT:
The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92) adapted to output a phase error (152), a vertical sync discrete time oscillator (DTO) block (98) adapted to output a vertical sync DTO (130) based on the phase error (152), and an output logic (100) adapted to detect a vertical sync based on the vertical sync DTO (130).

REFERENCES:
patent: 4577163 (1986-03-01), Culp
patent: 4611230 (1986-09-01), Nienaber
patent: 4701795 (1987-10-01), Andrews et al.
patent: 5068731 (1991-11-01), Takeuchi
patent: 6018556 (2000-01-01), Janesch et al.
patent: 6169581 (2001-01-01), Conover
patent: 6366327 (2002-04-01), Renner et al.
patent: 6594330 (2003-07-01), Wilson

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