Equalizer for the correction of digital signals

Pulse or digital communications – Repeaters – Testing

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333 28R, H04B 314

Patent

active

045049580

ABSTRACT:
An equalizer designed to correct both precursor and postcursor distortion in signal samples periodically obtained from a train of digital symbols comprises two parallel circuit branches each including a delay line preceded by a linear upstream filter for postcursor suppression in the case of the first branch and precursor suppression in the case of the second branch. A decision stage in parallel with the delay line of the first branch works into a nonlinear downstream filter delivering a precursor-correcting signal to an adder which also receives precorrected earlier signals from the two delay lines. A second decision stage connected to an output of the adder feeds back to that adder a postcursor-correction signal via another nonlinear downstream filter. The purged signal emitted by the second decision stage may be subjected to additional filtering and precursor/postcursor correction with the aid of another adder and a third decision stage provided with a further feedback loop.

REFERENCES:
patent: 4097807 (1978-06-01), Fujimura
patent: 4170758 (1979-10-01), Tamburelli
patent: 4283788 (1981-08-01), Tamburelli
patent: 4288872 (1981-09-01), Tamburelli
Article entitled "Digital Receiver with Distributed and Integrated Decision Feedback . . . ", by G. Tamburelli-Dec. 1976.

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