Equalizer filter configuration for processing real-valued and co

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36472419, 375232, G06F 1710

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059128283

ABSTRACT:
An apparatus and method of implementing an equalizer filter configuration including a plurality of memory blocks and a plurality of filter blocks. The respective pluralities of memory blocks and filter blocks are coupled so that the equalizer filter configuration has the capability to process input signal samples. The input signal samples include signal samples selected from the group consisting essentially of complex-valued signal samples and real-valued signal samples.

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