Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of biasing or erasing
Reexamination Certificate
2000-08-11
2001-10-16
Sniezek, Andrew L. (Department: 2651)
Dynamic magnetic information storage or retrieval
General recording or reproducing
Specifics of biasing or erasing
C375S232000
Reexamination Certificate
active
06304402
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an equalizer and a magnetically recorded-signal reproducer, more particularly to an equalizer suitable for the processing of a reproduced signal by an MR-type read head and a magnetically recorded-signal reproducer using the MR-type read head.
In a magnetic disk drive, the sensitivity of a read head has been improved to increase the density and a read head (hereafter referred to as MR head) using the magnetoresistance effect has been developed instead of conventional inductive heads.
The flux-to-reproduced voltage conversion characteristic of the MR head is shown by the curve
76
of FIG.
11
. The operating area of the MR head
74
is set to the linear portion of the characteristic
76
by superposing a bias field
73
on an input field
71
sent from a magnetic recording medium with information recorded. In this case, non-linearity represented by amplitude asymmetry appears on the reproduced waveform
72
due to the deviation of the bias field or the variation of the magnetic characteristics. In general, the circuits of the signal processing system of a magnetic disk drive is designed assuming that a magnetically recorded-signal reproducing system including a write head and a read head is linear. Therefore, the non-linearity which appears in the operating area of the MR head causes the performance of the magnetic disk drive to greatly deteriorate.
In a conventional disk drive, the non-linearity of the MR head is linearly equalized by the FIR-type equalizer shown in FIG.
2
.
The FIR-type equalizer comprises a plurality of delay elements
1
(
1
-
1
to
1
-n) multistage-connected to delay the input signal by one bit in time, a plurality of coefficient processing units
2
-
0
to
2
-n connected to the input signal tap at the first stage and the output signal tap at each stage, and an adder
10
for adding the outputs of the coefficient processing units. The coefficient processing unit
2
-
1
multiplies the tap output
11
-i by a predetermined tap coefficient. When the input signal waveform of a tap output has a distortion, each coefficient processing unit performs a linear operation of the distorted signal and therefore, it is difficult to completely compensate the above non-linearity. Therefore, to prevent performance deterioration, an idea for correcting the non-linearity of a reproduced signal before the signal is input to an equalizer has been proposed.
In U.S. Pat. No. 5,418,660, for example, a system is proposed which corrects the amplitude asymmetry of the reproduced waveform supplied to an equalizer by setting an A-D conversion scale to a different value in accordance with the polarity (positive or negative) of the input signal in an A-D converter for supplying the input to the equalizer.
In Japanese Patent Laid-Open No. 44510/1994, a method is proposed according to which the amplitude value is corrected (converted) by converting the reproduced signal output from an MR head from analog to digital values and thereafter using a look-up table. In the above proposals, the conversion characteristic of the amplitude value to be set in the look-up table is obtained by measuring the characteristics of each MR head while previously changing the bias field of the MR head. When the characteristic of an MR head is changed, fitting is performed in accordance with the data stored in the table.
Moreover, in Japanese Patent Laid-Open No. 266403/1993, a method is proposed which reduces the deterioration due to non-linearity by optimizing the equalization target of an FIR filter.
Furthermore, there is an idea of improving non-linearity including non-linear transition shift by using an equalizer constituted by incorporating a RAM into a decision feedback equalizer.
However, according to the conventional system for correcting MR non-linearity before the input of an equalizer, complicated characteristic are necessary for a canceler in order to completely remove non-linearity and therefore, a problem arises that the circuit is increased in size and the fabrication cost rises because the structure of the arithmetic circuit is complicated and the memory capacity is increased. Moreover, according to the conventional system, the circuit delay of an additional circuit provided in the reproduced signal path adversely affects the feed loop system for phase locked loop (PLL) and automatic gain control (AGC). Furthermore, according to a system of correcting MR non-linearity by an A-D converter, it is difficult to accurately fabricate an LSI because the applied voltages and loads of circuit elements constituting the A-D converter change when the reference voltage is changed to change the scaling. Moreover, to change the scaling by the reference voltage of the A-D converter, the correction coefficient becomes an analog value and thereby, accurate correction is difficult due to variations in circuit elements.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an equalizer capable of compensating the non-linearity of an MR head by a relatively simple circuit structure.
It is another object of the present invention to provide a magnetically recorded-signal reproducer capable of performing linear-signal-processing of the reproduced signal sent from a magnetic recording medium with information recorded at a high density.
To solve the above problems, an equalizer of the present invention comprises a plurality of delay elements multistage-connected so as to successively delay the input signals by a certain period, a plurality of coefficient processing units for multiplying the signals from the input or output taps of the delay elements by coefficient values and outputting them, and an adder for adding the signals output from the coefficient processing units so as to select coefficient values to be used for arithmetic operation in accordance with the signal inputs to the coefficient processing units. In the case of coefficient value selection performed by each coefficient processing unit, it is also possible to prepare, for example, two coefficient values and change them according to the polarity of the signal input to the coefficient processing unit.
A digital recorded-signal reproducer of the present invention comprises a read head using an MR element for reading the coded signals recorded on a recording medium, amplification means for amplifying the reproduced signals output from the read head, means for sampling signals output from the amplification means at a predetermined cycle, means for equalizing the signals output from the sampling means in accordance with a predetermined equalization rule, and means for discriminating recorded signals read by the read head in accordance with signals output from the equalization means, in which the equalization means is provided with means for correcting the signal distortion inherent to the read head and included in the signal output from the sampling means.
The correction means corrects the amplitude distortion which differs depending on the polarity of the signal output from sampling means.
REFERENCES:
patent: 5283521 (1994-02-01), Ottesen et al.
patent: 5398259 (1995-03-01), Tsujimoto
patent: 5414571 (1995-05-01), Matsushige et al.
patent: 5418660 (1995-05-01), Sato et al.
patent: 5543978 (1996-08-01), Park
patent: 5654765 (1997-08-01), Kim
patent: 5744993 (1998-04-01), Sonntag
patent: 5-266403 (1993-10-01), None
patent: 6-44510 (1994-02-01), None
Mita Seiichi
Nishida Yasutaka
Satoh Naoki
Watanabe Yoshiju
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Sniezek Andrew L.
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