Equalization system with stabilized peaking gain for a...

Amplifiers – With semiconductor amplifying device – Including frequency-responsive means in the signal...

Reexamination Certificate

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C330S303000

Reexamination Certificate

active

08081031

ABSTRACT:
An equalization system (18) that reduces inter-symbol interference in an input signal (220) includes a variable gain amplifier (430), and one or more peaking amplifiers (432) that are connected in series to the variable gain amplifier (430). The variable gain amplifier (430) receives the input signal (220) and scales the input signal (220) while each peaking amplifier (432) can be selectively controlled to selectively adjust a peaking gain (326) and a peaking corner frequency (328). Additionally, the equalization system (18) can include a PTAT bias generator (434) that provides a PTAT bias current to one or more of the peaking amplifiers (432) to maintain a transconductance of one or more of the peaking amplifiers (432) substantially constant as temperature changes. With this design, the equalization system (18) provides programmable and stabilized equalization gain, has a tunable peaking corner frequency, and superior common mode rejection.

REFERENCES:
patent: 4293823 (1981-10-01), Hochberg et al.
patent: 4684899 (1987-08-01), Carpentier
patent: 4792977 (1988-12-01), Anderson et al.
patent: 6188279 (2001-02-01), Yuen et al.
patent: 7076229 (2006-07-01), Wang
patent: 2007/0063757 (2007-03-01), Bouras
patent: 2010/0130158 (2010-05-01), Khoini-Poorfard et al.
Jong-Sang Choi, Moon-Sang Hwang, A 0.18-μm CMOS 3.5 Gb/s Continuous-Time Adaptive Cable Equalizer Using Enhanced Low-Frequency Gain Control Method, IEEE Journal of Solid-State Circuits, Mar. 2004, pp. 419-425, vol. 39, No. 3, © 2004 IEEE.
Troy Beukema, et al., A 6.4-Gb/s CMOS SerDes Core with Feed-Forward and Decision-Feedback Equalization, IEEE Journal of Solid-State Circuits, Dec. 2005, pp. 2633-2645, vol. 40, No. 12, © 2005 IEEE.
Lidong Chen, Fulvio Spagna, Phil Marzolf, John K. Wu, A 90nm 1-4.25-Gb/s Multi Data Rate Receiver for High Speed Serial Links, Nov. 2006, pp. 391-394, 0-7803-9735-5/06, IEEE Asian Solid-State Circuits Conference, © 2006 IEEE.

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