Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal
Reexamination Certificate
2000-12-11
2002-12-17
Cao, Phat X. (Department: 2814)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
C438S039000, C438S041000, C438S046000, C438S047000, C438S141000, C438S285000, C257S431000, C257S458000, C257S459000, C257S461000, C257S466000
Reexamination Certificate
active
06495380
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to P-I-N photodiodes, particularly avalanche photodiodes, and to a method of manufacturing such photodiodes.
BACKGROUND OF THE INVENTION
The generic structure of an Avalanche Photodiode (APD) consists of two electrical contacts separated by a P-I-N diode. The two electrical contacts are separated by at least three layers of semiconductor material. One electrical contact is in contact with a P-doped semiconductor layer (P-layer). The second electrical contact is in contact with an N-doped semiconductor layer (N-layer). The P-doped semiconductor layer is separated from the N-doped semiconductor layer by at least one intrinsic semiconductor layer (I-layer). More than one I-layer may be used to enhance performance of the APD. The dimensions, doping levels, and material of each layer depend on the application for which the APD will be used. The APD is bounded on its edges by termination junctions lying perpendicular to the planes of the junctions between the layers.
One current APD structure widely available commercially is a planar structure. A lower I-layer is epitaxially grown on the N-layer. An upper I-layer is epitaxially grown on the lower I-layer. Rather than growing a P-layer, a P-region is introduced into a portion of the upper I-layer by diffusion of P-type impurities through a window in a dielectric mask. The APD is bounded on its edge by imaginary termination junctions. These termination junctions are imaginary in that they are not defined physically, but occur because the upper I-layer electrically isolates different P-regions diffused into the same material. Because the termination junctions are never exposed to any processing or ambient environment, the termination junctions are strong and planar structures are of superior reliability. However, the depth of the P-region is difficult to control precisely due to the nature of the diffusion process. As a result, the high performance required of APDs is difficult to achieve. In addition, because the diffusion process allows P-type impurities to end up under the edges of the mask and the P-region is therefore extended horizontally in undesired locations, parasitic capacitance effects arise.
A second current APD structure used in research and available commercially in small quantities is a mesa structure. As with the planar structure, an I-layer is epitaxially grown on a N-layer. However, the P-layer is then epitaxially grown on the I-layer. The termination junctions are formed by dry etching all layers at the desired width of the APD. Formation of the P-layer through epitaxial growth results in a well defined P-layer thickness and doping profile, and the horizontal dimension of the P-layer is well defined because of the dry etching process, and parasitic effects are much less than in a planar structure. The well defined thickness and horizontal dimension of the P-layer allow high performance APDs to be built. Edge breakdown can be reduced by bevelling the edges of the layers. However, edge breakdown is still a factor as the termination junction is exposed to ambient air during the fabrication process, and the reliability of the APD is reduced.
SUMMARY OF THE INVENTION
The present invention provides a method of fabricating a semiconductor photodiode comprising epitaxially grown layers of semiconductor material. A first doped layer is formed on a semi-insulating substrate, and has a p-type conductivity. An intrinsic layer is formed lying adjacent to the first doped layer. Other intrinsic layers may be formed over the first intrinsic layer. A second doped layer having an n-type conductivity is formed adjacent to the uppermost intrinsic layer. The second doped layer is etched to leave an island-like structure. The edge regions of the intrinsic layers and the first doped layer are doped using deep diffusion to produce doped regions having a p-type conductivity. The result of the deep diffusion process is that the horizontal dimension in each layer of the portion which does not contain the doped region decreases with vertical proximity to the second doped layer. The deep diffusion may be achieved by placing a dielectric over the second doped layer and extending partially over the uppermost intrinsic layer, and diffusing impurities through the uncovered portions of the uppermost intrinsic layer as far as and into the first doped layer. Alternately, the first doped layer has an n-type conductivity, the second doped layer has a p-type conductivity, the doped regions have an n-type conductivity, and the doped regions are formed by ion implantation through the vertical surfaces of a mesa structure. The invention is particularly suited to avalanche photodiodes, in which suppression of edge breakdown is most beneficial.
High performance photodiodes can be produced using this method because the formation of the various layers through epitaxial growth results in well managed doping profiles and layer thicknesses. Furthermore, because the junctions between the N-layer and the intrinsic layer are not diffused junctions there is less parasitic capacitance than in planar devices. The photodiodes are highly reliable as the termination junctions are formed by the doping regions, and are never exposed to the ambient environment. No guardrings and no special layers are needed to suppress edge breakdown.
Other aspects and features of the present invention will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments of the invention in conjunction with the accompanying figures.
REFERENCES:
patent: 4794439 (1988-12-01), Webb et al.
patent: 5552629 (1996-09-01), Watanabe
S. M. Sze, Physics of Semiconductor Device, 2ndEd, 1981, p. 774-776.
An Serguei
Clark William R.
Cao Phat X.
Louie Wai-Sing
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