Epitaxial wafers, method for manufacturing of epitaxial...

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure

Reexamination Certificate

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C257S080000, C257S094000, C257S184000, C257SE21065, C438S022000, C438S037000, C438S046000

Reexamination Certificate

active

07825417

ABSTRACT:
A technique for suppressing the bowing of an epitaxial wafer is provided. The epitaxial wafer is prepared by successively epitaxially growing a target group III-nitride layer, an interlayer and another group III-nitride layer on a substrate with a buffer layer. The interlayer is mainly composed of a mixed crystal of GaN and InN expressed in a general formula (GaxIny)N (0≦x≦1, 0≦y≦1, x+y=1) (or a crystal of GaN), and does not contain Al. The interlayer is epitaxially formed at a lower growth temperature than those of the group III-nitride layers, more specifically at a temperature in a range of at least 350° C. to not more than 1000° C.

REFERENCES:
patent: 6828593 (2004-12-01), Sugawara et al.
patent: 6956882 (2005-10-01), Okumura
patent: 7163876 (2007-01-01), Nagai et al.
patent: 2001/0002048 (2001-05-01), Koike et al.
patent: 2001/0048114 (2001-12-01), Morita et al.
patent: 11-40847 (1999-02-01), None
patent: 2002-299252 (2002-10-01), None
patent: 2003-86520 (2003-03-01), None

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