Epitaxial process for the fabrication of a field effect transist

Details Epitaxial process for the fabrication of a field effect transist Epitaxial process for the fabrication of a field effect transist

1977-05-17

1978-05-16

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29571, 29578, 148187, 148191, 148 15, 357 20, 357 23, 357 90, 357 91, H01L 2120, H01L 2978

Patent

active

040897125

ABSTRACT:
An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.
In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.
In an alternate embodiment of the method for forming a field effect transistor, a first ion implantation is formed in the drain region, such that the peak impurity concentration is located well within the body spaced from the surface thereof, and a second ion implantation, or diffusion, performed forming the source and also the ohmic contact for the drain which is located over the first region and within the first implanted region.

REFERENCES:
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patent: 3397326 (1968-08-01), Gallagher et al.
patent: 3408543 (1968-10-01), Ono et al.
patent: 3434021 (1969-03-01), Hofstein
patent: 3614555 (1971-10-01), Glinski et al.
patent: 3748545 (1973-07-01), Beale
patent: 3787962 (1974-01-01), Yoshida et al.
patent: 3793721 (1974-02-01), Wakefield et al.
patent: 3879236 (1975-04-01), Langdon
patent: 3936857 (1976-02-01), Ota
Jadus, D. K., "Buried Field Effect Transistor", I.B.M. Tech. Discl. Bull., vol. 13, No. 6, Nov. 1970, pp. 1431-1432.

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