Metal treatment – Barrier layer stock material – p-n type – Having at least three contiguous layers of semiconductive...
Patent
1986-11-12
1987-09-29
Chaudhuri, Olik
Metal treatment
Barrier layer stock material, p-n type
Having at least three contiguous layers of semiconductive...
437 95, H01L 2936, H01L 2938
Patent
active
046967010
ABSTRACT:
A thin high resistivity epitaxial layer is provided over the entire surface of a semiconductor wafer in order to minimize autodoping while growing a desired epitaxial layer over the entire semiconductor wafer. The thin low resistivity epitaxial layer acts as a seal and is of the same conductivity type as the semiconductor wafer or substrate. The thin epitaxial layer effectively becomes a part of the substrate or semiconductor wafer. The seal layer or thin epitaxial layer is needed when growing an epitaxial layer over a very low resistivity silicon semiconductor wafer.
REFERENCES:
patent: 3454434 (1969-07-01), Jackson, Jr. et al.
patent: 3488235 (1970-01-01), Walczak et al.
patent: 3904449 (1975-09-01), Dilorenzo et al.
Doo et al., IBM Tech. Disc. Bull. V. 5 (1962), pp. 50-51.
Ghandhi, VLSI Fabrication Principles, John Wiley & Sons (New York), 1983, pp. 128-132, 164, 165.
Barbee Joe E.
Chaudhuri Olik
Motorola Inc.
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