Envelope detector including sample-and-hold circuit controlled b

Details Envelope detector including sample-and-hold circuit controlled b Envelope detector including sample-and-hold circuit controlled b

1996-06-13

1998-03-03

Grimm, Siegfried H.

Demodulators

Amplitude modulation demodulator

Input signal combined with local oscillator or carrier...

329362, 329363, 455337, H03D 102

Patent

active

057240027

ABSTRACT:
A sampling synchronous envelope detector adopts a specialized sample-and-hold ("S&H") approach, basing a detected output on instantaneous values of the carrier waveform which are sampled at specially chosen instants. Non-linear distortion is avoided by timing the sampling instants to occur at or near a carrier wave peak which is subsequent to an earlier carrier wave peak which serves as a time base. Sampling instants occur only at or near positive carrier peaks (or only at or near negative peaks) in a half-wave embodiment, and sampling instants occur at or near both positive and negative carrier peaks in a full wave embodiment. Another aspect of the detector provides means, such as a phase locked loop, for ensuring that the phase of the sampling instants is maintained continuously, even in the event of carrier pinch-off or other event which distorts or minimizes the carrier waveform from which the timing instants would otherwise be determined. Still another aspect of the detector provides for low pass filtering, and group delay equalization of the filtered signal, before it is output.

REFERENCES:
patent: 3154749 (1964-10-01), Perkins
patent: 3378779 (1968-04-01), Priddy
patent: 3651419 (1972-03-01), Janz
patent: 4031479 (1977-06-01), Thomas, Jr. et al.
patent: 4393352 (1983-07-01), Volpe et al.
patent: 4426623 (1984-01-01), Wilkens et al.
patent: 4617521 (1986-10-01), Fox

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