Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1996-10-03
1999-10-26
Dang, Thi
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438694, 438753, 438964, 438945, 438665, H01L 2100
Patent
active
059727713
ABSTRACT:
A method for forming HSG polysilicon with reduced dielectric bridging and increased capacitance. A first polysilicon layer is deposited and doped with impurities to increase conductivity. A second polysilicon layer is deposited at a reduced temperature to cause a nucleation of the second polysilicon layer. Grains are formed on the surface of the second polysilicon layer as a result of the nucleation. Next a wet etch is performed to remove portions of the polysilicon grains and portions of the first polysilicon layer. The duration of the wet etch is controlled to retain a roughened surface area. The size of the grains decreases during the wet etch and the distance between the grains increases. A dielectric layer is deposited to overlie the rough polysilicon following the wet etch. The thickness of the dielectric layer tends to be uniform thereby reducing bridging of the dielectric between the grains of the of the polysilicon.
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Dang Thi
Micro)n Technology, Inc.
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