Enhanced write abort mechanism for non-volatile memory

Details Enhanced write abort mechanism for non-volatile memory Enhanced write abort mechanism for non-volatile memory

2007-08-06

2009-10-06

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Powering

Data preservation

C365S226000, C365S229000, C365S206000

Reexamination Certificate

active

07599241

ABSTRACT:
In a non-volatile memory (NVM) device having a controller and a non-volatile memory array controlled by the controller a voltage supervisor circuit monitors an output of a voltage supply powering the NVM device. The voltage supervisor circuit may be part of the NVM device or coupled to it. The voltage supervisor circuit is configured to assert a “low-voltage” signal responsive to detecting the output of the voltage supply powering the NVM device dropping below a predetermined value. The controller is configured to write data into the memory array while the “low-voltage” signal is deasserted and to suspend writing data while the “low-voltage” signal is asserted. In response to assertion of the “low-voltage” signal, the controller completes a write cycle/program operation, if pending, and prevents any additional write cycles/program operation(s) during assertion of the “low-voltage” signal.

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