Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-06-11
2002-09-24
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S253000
Reexamination Certificate
active
06456161
ABSTRACT:
BACKGROUND
1. Field of the Invention
The invention relates generally to the field of electronic circuits, and more particularly, to enhancing slew rates in electronic circuits such as amplifier circuits.
2. Background Information
The present invention relates generally to high speed equipment such as communication systems, displays, and the like, ranging from cell phones to computer displays, in which the large signal behavior of the amplifier is an important consideration. The present invention involves a variety of designs which may provide techniques to achieve good large signal behavior in a variety of circuit arrangements.
Analog circuit elements in a system need to apply a specified signal swing to the next element in the circuit. The next element often has a required signal swing for maximum dynamic range, such as the full scale level of an analog to digital converter. As systems evolve for use at higher bandwidths, analog circuit elements, particularly elements with feedback, reach their large signal limits. Large signal performance is usually measured as slew rate, defined as the maximum rate of voltage change possible for a circuit at a given node.
The classic slew rate limit in an amplifier often occurs when a stage in the amplifier (usually an input stage) has a fixed maximum current, and this stage must charge capacitance. This is illustrated in
FIG. 1
, which shows an amplifier circuit
10
that includes an input stage
20
and an output stage
30
. Input stage
20
supplies a current with a fixed maximum to output stage
30
, and this current can be applied to a capacitor
104
that resides in output stage
30
.
As shown in
FIG. 1
, input stage
20
includes a differential pair of transistors
101
and
102
that receive a differential input signal
111
at their respective base terminals
110
and
112
. Differential input signal
111
controls how much current flows through transistors
101
and
102
. A current generator
103
is coupled to transistors
101
and
102
at their respective emitter terminals
114
and
116
. Current generator
103
provides amplifier circuit
10
with current, and this current typically has a fixed maximum. Therefore, the maximum current that transistors
101
and
102
can apply to output stage
30
, and ultimately to capacitor
104
, is the current generated by current generator
103
. This can then determine the maximum charging rate of capacitor
104
by the current-voltage relationship for a capacitor:
∂
V
∂
t
=
I
C
where
∂
V
∂
t
is the time rate of change of voltage (slew rate), I is the current
103
and C is the capacitance
104
.
To complete the circuit of input stage
20
, transistors
101
and
102
include a pair of collector terminals
118
and
120
that are electrically coupled to a pair of resistors
105
and
106
. Resistors
105
and
106
are in turn coupled to a path to ground
122
.
Output stage
30
includes a transistor
107
with an emitter terminal
124
that is electrically coupled to collector terminal
120
of transistor
102
. Transistor
107
is operated by a reference voltage
129
that is applied to a base terminal
126
of transistor
107
. Transistor
107
also has a collector terminal
128
that is coupled to capacitor
104
via output line
132
, and capacitor
104
is in turn coupled to a path to ground
130
. Output line
132
is typically connected to additional circuitry that is unrelated to amplifier circuit
10
for the purposes of this description, and is therefore not shown.
While there are a variety of techniques in use to improve slew rate, no single design achieves its goals without limiting performance in other areas. For instance, a common technique well known in the art is input stage degeneration. This technique does provide larger slew rates, but it increases noise and degrades open loop gain. Another common technique uses an input stage which is not current limited, one example of which is set forth in U.S. Pat. No. 5,049,653 issued to Smith, et al., which is hereby incorporated by reference. This technique is commonly used in current feedback amplifiers, and has been implemented in voltage feedback amplifiers as well. The drawback of a non-current limited input stage is that more voltage is required to bias the stage, making it not usable in low supply voltage or battery applications.
In addition, it is not feasible to use a non-current limited input stage in single supply applications which require the input common mode range to include one or both supplies. Thus, even though solutions to the problems mentioned in this disclosure have existed, none are believed to have provided the proper balance of competing concerns in most applications and certainly none have met the various criteria which may now be met by the present invention, especially in the low voltage, single supply or battery operated area or the like. Accordingly, there is a need for an improved amplifier system and method that does not limit the slew rate of a circuit.
SUMMARY
The disadvantages and problems associated with current limited stage amplifiers and other similar circuits have been improved using the present invention.
In accordance with an embodiment of the invention, an amplifier circuit comprises an input stage capable of receiving and amplifying an input signal, a gain stage capable of further amplifying the input signal, wherein the gain stage is electrically coupled to the input stage, and an output stage capable of charging a capacitance of the amplifier circuit and outputting the amplified input signal, wherein the output stage is electrically coupled to the gain stage.
According to another embodiment of the invention, the input stage of the amplifier circuit comprises a differential pair of transistors, each transistor comprising a base, an emitter, and a collector, a current generator electrically coupled to the emitters of the differential pair of transistors, a pair of input lines electrically coupled to the bases of the differential pair of transistors, the input lines configured to carry an input signal, a pair of resistors electrically coupled to the collectors of the differential pair of transistors, and a path to ground electrically coupled to the pair of resistors.
According to yet another embodiment of the invention, the gain stage of the amplifier circuit comprises a pair of gain transistors, each gain transistor comprising a base, an emitter, and a collector, wherein the bases of the gain transistors are electrically coupled to the input stage, wherein the collectors of the gain transistors are electrically coupled to a path to ground, and wherein the emitters of the gain transistors are electrically coupled to the output stage.
And according to yet another embodiment of the invention, the output stage of the amplifier circuit comprises a pair of output transistors, each output transistor comprising a base, an emitter, and a collector, wherein the emitters are electrically coupled to the gain stage, a reference voltage line electrically coupled to the bases of the output transistors, the reference voltage line configured to carry a reference voltage signal, and a pair of output lines electrically coupled to the collectors of the output transistors.
An important technical advantage of the present invention includes applying the amplified input signals produced in the input stage of an amplifier circuit to the base terminals of transistors in a gain stage of the amplifier circuit. This configuration breaks the typically direct relationship between the input stage and the output stage of an amplifier circuit. So here, when the low current, input stage signals are disassociated from the output stage of the amplifier circuit, the output stage is free to operate at higher currents. The result is an increase in the slew rate of the amplifier circuit.
REFERENCES:
patent: 4881045 (1989-11-01), Dillman
patent: 5446412 (1995-08-01), Kimyacioglu et al.
patent: 5818295 (1998-10-01), Chimura et al.
patent: 6160450 (2000-12-01), Eschauzier e
Engineer Rahul D.
Fairchild Semiconductor Corporation
Nguyen Patricia T.
Pascal Robert
Skjerven Morrill LLP
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