Enhanced SDRAM bandwidth usage and memory management for TDM...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S321000, C370S347000, C370S382000, C370S379000, C711S005000

Reexamination Certificate

active

07460545

ABSTRACT:
A method and apparatus for managing memory for time division multiplexed high speed data traffic is provided. The method and apparatus utilize an interleaving approach in association with multiple memory banks, such as within SDRAM, to perform highly efficient data reading and writing. The design issues a first command or access command, such as a read command or write command to one memory bank, followed by an active command to a second memory bank, enabling efficient reading and writing in a multiple data flow environment, such as a SONET/SDH virtual concatenation environment using differential delay compensation.

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Infineon Technology; HYB25D256400/800T/AT 256-MBit Double Data Rata SDRAM: 2001; pp. 1-72.

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