Enhanced performance memory systems and methods

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S230050, C365S148000

Reexamination Certificate

active

07965532

ABSTRACT:
Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.

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patent: 6493394 (2002-12-01), Tamura et al.
patent: 7167945 (2007-01-01), Feldstein et al.
patent: 2002/0084458 (2002-07-01), Halbert et al.
patent: 0046408 (1982-02-01), None
patent: 0254473 (1988-01-01), None

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