Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2011-06-21
2011-06-21
Dinh, Son T (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S230050, C365S148000
Reexamination Certificate
active
07965532
ABSTRACT:
Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.
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Greeff Roy E.
Ovard David K.
Dinh Son T
Micro)n Technology, Inc.
Schwegman Lundberg & Woessner, P.A.
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