Enhanced interconnect testing through utilization of board topol

Details Enhanced interconnect testing through utilization of board topol Enhanced interconnect testing through utilization of board topol

1994-03-09

1996-04-30

Beausoliel, Jr., Robert W.

Excavating

H04B 1700

Patent

active

055131883

ABSTRACT:
A method for generating improved detection and diagnostic test patterns and for improving the diagnostic resolution of interconnect testing of a circuit is based on the premise that short-circuits are most likely to result from solder bridges between closely adjacent pins. In a first embodiment, an optimal boundary-scan test pattern is generated. In a second embodiment, boundary-scan test diagnosis is enhanced by utilizing x,y coordinate data corresponding to the physical location of devices on the tested circuit. In a third embodiment, diagnosis of unpowered short-circuit testing is enhanced.

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