Enhanced flux semiconductor device with mesa and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Punchthrough structure device

Reexamination Certificate

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C257S498000, C257S361000, C257S362000, C257S618000

Reexamination Certificate

active

06459133

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a semiconductor device comprising a semiconductor body which includes a substrate and is provided with a mesa, said semiconductor body comprising, in succession, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, opposite to the first conductivity type, and a third semiconductor region of the first conductivity type, the first and the third semiconductor regions being provided with an electrical connection conductor across which, during operation, an electric voltage is applied, and the thickness and the doping concentration of the second semiconductor region being chosen such that, during operation, the second semiconductor region is fully depleted. Such a device, which is also referred to as a “punch-through” diode, is used, for example, as a power diode or a so-called Transient Voltage Suppressor or as a so-called camel diode. If such a diode is used as a power or camel diode, its barrier is preferably as low as possible in view of the use of such a diode at a (very) high current density. The invention also relates to a method of manufacturing such a device.
Such a diode is known from the article “Punchthrough Transient Voltage Suppressor for EOS/ESD Protection of Low-Voltage ICs” by Bin Yu et. al., which was published in 1995 in Proceedings EOS/ESD Symposium 1995, 1.4.1-1.4.7, pp 27-33.
FIG. 4
of said publication shows a punch-through diode with a mesa having an npn layer structure.
The two n-type layers are provided with a connection conductor across which, during operation of the diode, a voltage is applied. In this diode, one of the two pn-junctions is in the forward direction while the other pn junction is in the reverse direction. The thickness and the doping concentration of the p-type region are chosen so that this region is depleted during operation.
The drawback of the known device resides in that it carries a high current already at a voltage below the operating voltage, which is undesirable. The current at the operating voltage, however, often is lower than desirable.
SUMMARY OF THE INVENTION
Therefore, it is an object of the invention to provide a device which does not have the above drawback and which, consequently, carries a low current at a voltage below the (maximum) operating voltage, and which preferably carries a current which is as high as possible at a voltage equal to the operating voltage. The diode which meets these requirements should additionally be easy to manufacture.
To achieve this, a device of the type mentioned in the opening paragraph is characterized in that a part of the second semiconductor region, which, viewed in projection, adjoins the edge of the mesa, is provided with a flux of doping atoms of the second conductivity type, which is greater than that in the rest of the second semiconductor region. It has been found that, in any case, such a diode carries a relatively low current at a voltage below the operating voltage. The invention is first of all based on the recognition that the relatively high current which the known diode carries at a voltage below the operating voltage can be attributed to the fact that in this diode the punch-through situation locally already occurs at a voltage below the operating voltage while it should occur at the same time everywhere. Further analysis has revealed that the punch-through situation occurs first near the edge of the mesa. The invention is further based on the recognition that by increasing the flux of the doping atoms of the second semiconductor region, it is achieved that punch-through at the edge of the diode occurs at a later time. The reason for this being that increasing the flux of doping atoms in the second semiconductor region means increasing either the doping concentration or the thickness of said region. As a result of each one of the two measures, the depletion layer of the one pn-junction formed by the second semiconductor region does not reach the other pn-junction formed by the second semiconductor region until a higher voltage level has been reached. An increase of the doping concentration leads to a more rapid decrease of the electric field in the second semiconductor region, which implies that only at a higher voltage complete depletion is achieved. The same effect is achieved by increasing the thickness of the second semiconductor region.
Both measures can of course be taken simultaneously, however, only one of them is necessary. Even if, for example, the thickness is sufficiently increased while, at the same time, the doping concentration is reduced, the situation of punch-through can still be postponed to a later time. However, this reduction should not be so strong that it completely annihilates the positive effect of a larger thickness. A similar situation occurs with respect to the thickness when it has been decided to increase the doping concentration. Preferably, in a device in accordance with the invention, the thickness of the second semiconductor region is increased locally, near the edge of the mesa. This does not only yield the best results but it also results in a diode which can be readily manufactured.
This can be attributed to the fact that the desired effect is obtained in a simple manner by carrying out an ion implantation of doping atoms of the second conductivity type in the first semiconductor region near the edge of the mesa (to be formed). As a result, the risk that the properties of the second and third semiconductor regions, which are preferably very thin, as will become apparent later on in the text, might possibly be influenced is minimal. The reason for this being that said ion implantation can be readily carried out prior to the formation of the second and third semiconductor regions. Said regions may preferably be formed, for example, by means of epitaxy.
Further analyses show that, particularly when the device is used as a camel diode, the best results are obtained if the doping concentrations in the device demonstrate an asymmetric structure. The doping concentration of the third semiconductor region should be much higher than the doping concentration in the first semiconductor region. The same applies to the doping concentration in the second semiconductor region. These measures lead to a diode having excellent self-aligning properties. By virtue of a low barrier, such a device can very suitably be used to carry very high current densities. Suitable doping concentrations for the first, second and third semiconductor regions preferably range from, respectively, 10
14
to 10
15
at/cm
3
, 10
17
to 10
19
at/cm
3
and 10
19
to 10
20
at/cm
3
, and amount to, for example, respectively 10
15
, 5×10
17
and 10
19
at/cm
3
.
A method of manufacturing a semiconductor device, wherein a semiconductor body which includes a substrate is formed and provided with a mesa within which a stack is formed of a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, opposite to the first conductivity type, and a third semiconductor region of the first conductivity type, the first and the third semiconductor regions being provided with an electrical connection conductor across which, during operation, an electric voltage is applied, and the thickness and the doping concentration of the second semiconductor region being chosen such that, during operation, the second semiconductor region is fully depleted, characterized in that a part of the second semiconductor region, which, viewed in projection, adjoins the edge of the mesa, is provided with a flux of doping atoms of the second conductivity type, which is greater than that in the rest of the second semiconductor region. Preferably, the thickness of the part of the second semiconductor region adjoining the edge of the mesa is increased.
In a preferred embodiment of a method in accordance with the invention, the part of the second semiconductor region adjoining the edge of the mesa is increased in thickness by providing

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