Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1997-05-28
2003-03-18
Paladini, Albert W. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
Reexamination Certificate
active
06534724
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a device and method for forming an improved conductive interconnection between a voltage plane on the back side of a printed circuit card or board and a thick metal heat sink in which flow of the adhesive is limited during lamination.
BACKGROUND OF THE INVENTION
Many modern high power radio frequency or microwave applications require significant current carrying capability and/or significant thermal dissipation. To meet these needs, a thick metal backer (“TMB”) is often connected to an external ground plane located on the surface of a printed circuit board (“PCB”) to improve the electrical performance of the ground plane and also to provide a heat sink for thermal dissipation. The TMB is essentially flat, but may contain a variety of holes and partial depth cavities for monitoring various types of components. These may or may not be hidden once the printed circuit card is attached. Methods for connecting such a thick metal plate have included sweat soldering, non-conductive adhesive bonding followed by plating through holes for electrical interconnectivity, gold coating the ground plane and applying a silicone adhesive which includes a mixture of silver particles, or by mechanical interconnection such as screws, rivets or soldered pins. Each of these methods have proven less than ideal as they tend to be too costly while compromising performance. Also, some of these methods result in poor reliability in the resulting circuit board assembly.
A more recent method meeting the current carrying and/or thermal dissipation needs required for microwave applications involves treating the surface of the thick metal backer and then adhering the TMB to the PCB with a conductive adhesive. This method includes the steps of preparing a bonding surface of the TMB by grit-blasting to micro-roughen the bonding surface of the TMB. A conductive adhesive such as Ablestik 8175 is screened onto the TMB at a thickness of around 3 mils. The circuit board is placed onto the TMB and a 1 inch diameter roller is rolled across the circuit board to wet it with adhesive. This assembly formed by joining the TMB with the PCB is then placed under pressure in a spring-loaded clamping fixture with pressure exerted at about 1 psi. The assembly contained with the fixture is placed within a belt oven for curing. After curing the assembly is removed from the clamping fixture.
While the micro-roughening method improves the adhesive to thick metal backer interface strength, the low pressure, typically about 1 psi, used during the adhesive curing process may not be sufficient to result in a void free bond line when there is topography on the back side of the circuit board. For instance, the backside of the circuit board may be comprised of bare dielectric material in some places, but have circuit features that are as much as 2 mils (0.002 inches) above the dielectric. Moreover, a 2 mil (0.002 inch) protective coating of solder mask such as Taiyo PSR-4000 or solder mask as described in U.S. Pat. No. 5,026,624 “Composition for Foil Imaging”, commonly assigned and incorporated by reference herein, may also be present in selected areas on the backside of the printed circuit card, including areas where there are circuit features. The resulting topography in this example may therefore be as much as 4 mils. Thus, in the particular example when the surface topography of the printed circuit card is comparable to the bondline thickness (3 mils), voiding is likely to occur when using the known methods.
Prior attempts to overcome this problem of voiding due to surface topography have not been satisfactory. For example, the use of higher pressure during the process of laminating the circuit results in excessive squeeze out and flow of the adhesive. This adhesive flow can damage the assembly by creating unwanted electrically conducting pathways, contaminating surface features intended for subsequent use as solder attachments pads, and by changing the overall dimensions of the part if the edge bleed is significant. As another alternative, the use of a vacuum bagging technique to provide good conformance of the card to the TMB has been attempted, but also results in excessive bleed of the adhesive. In another approach, a thicker layer of adhesive is used, but even lower pressure are then required to prevent excess bleed. Moreover, this approach is undesirable because of the high cost of the adhesive, and the increase in electrical resistance associated with a thicker bondline.
Accordingly, a new and useful design for conductively bonding circuit board to a TMB (or to another circuit board) is needed where the appearance of voiding in the interface is eliminated without resorting to thicker adhesive layers. In particular, there is a need for a technique in which the bondline thickness can be less than the surface topography of the circuit card so as to economize on adhesive, and void free bonding is achieved without excessive adhesive bleed.
SUMMARY OF THE INVENTION
In accordance with the present invention, it has been found that partially curing a conductive adhesive after the adhesive has been screened onto a thick metal backer but before attaching the PCB can reduce the formation of trapped air or voids.
Thus, the present invention provides a new design and technique for enhancing the electrical properties of a thick metal backer/conductive adhesive/printed circuit board interface obtained by partially curing the adhesive before application of the PCB to the adhesive. The technique comprises preparing the connection surface of a TMB, screening on a conductive adhesive onto the TMB, partially curing the adhesive and then attaching the PCB for final cure under high pressure.
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Methods To Electrically Connect A1 Heat Sinks To Semiconductor Chip Packages—IBM Technical Disclosure Bulletin vol. 35 No. 1A Jun. 1992.
Process for Improved Photoresist to Polyimide Adhesion-Reproduced from Research Disclosure, Dec. 1989, No. 308—Kenneth Mason Publications, Ltd. England.
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Farquhar Donald Seton
Klodowski Michael Joseph
Kohut Gerard Paul
Seman Andrew Michael
Hogg William N.
Paladini Albert W.
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