Fishing – trapping – and vermin destroying
Patent
1988-10-27
1989-07-18
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437228, 437200, 437245, 437233, 148DIG47, H01L 21306
Patent
active
048493449
ABSTRACT:
An improved process for fabricating modified isoplanar integrated circuits with enhanced density incorporates a number of interactive and co-acting process steps. First, oxide isolation of epitaxial islands is effected in a two step process, forming a thin thermally grown oxide layer (32), over the surfaces of shallow trenches and then filling the shallow trenches with deposited low temperature oxide (34). Second, an enhanced single polycrystalline or polysilicon layer process uses a blanket implant, eliminates certain masking and etching steps, and defines the polycrystalline layer. Third, a new method and structure is provided for dielectrically isolating and separating contact locations on different surface levels of the integrated circuit structure adjacent to step locations between the surface levels. Finally, a new method constitutes all of the electrical contact locations for the elements of the integrated circuit structure at the same substantially isoplanar level.
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Desbiens Donald J.
Eldridge John W.
Howell Paul J.
Aaker Mark A.
Fairchild Semiconductor Corporation
Hearn Brian E.
Kane, Jr. Daniel H.
McAndrews Kevin
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