Enhanced binary decision diagram-based functional simulation

Details Enhanced binary decision diagram-based functional simulation Enhanced binary decision diagram-based functional simulation

1996-11-05

1999-08-10

Teska, Kevin J.

39550043, 39550036, G06F 9455

Patent

active

059371838

ABSTRACT:
In compiled code simulation, a circuit to be simulated is converted or compiled into an executable so that running the executable produces the same output response as the circuit itself. In a binary decision diagram (BDD)-based compiled code simulator, the simulation executable for the circuit is derived from a BDD-based characteristic function representation of the circuit rather than by the heretofore used translation of Boolean operations in the original circuit into machine instructions.

REFERENCES:
patent: 5493508 (1996-02-01), Dangelo et al.
patent: 5574893 (1996-11-01), Southgate et al.
Leiserson, et al. "Retiming Synchronous Circuitry", Algorithmica--An International Journal in Computer Science, vol. 6, No. 1, 1991, Special Issue, Algorithmic Aspects of VLSI Design, pp. 5-35.
Ashar, et al. "Fast Functional Simulation Using Branching Programs", Proceedings of the International Conference on Computer-Aided Design, pp. 408-412, Nov. 1995.
McGeer, et al. "Fast Discrete Function Evaluation Using Decision Diagrams", Proceedings of the International Conference on Computer-Aided Design, pp. 402-407, Nov. 1995.
Richard Rudell "Dynamic Variable Ordering for Ordered Binary Decision Diagrams", Proceedings of the International Conference on Computer-Aided Design, Nov. 1993.

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