Energy-to-pulse converter systems, devices, and methods...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C324S110000, C341S166000, C702S060000

Reexamination Certificate

active

06522982

ABSTRACT:

BACKGROUND
1. Technical Field
The invention generally relates to power metering and more particularly to energy-to-pulse converters having an output frequency greater than the calculation frequency and having output phasing.
2. Description of the Related Art
Electromechanical power meters have been employed in homes and businesses to monitor power consumption by particular users. Power monitoring permits utilities to monitor power (energy) usage of users to enable billing, load monitoring, servicing, and the like. Electromechanical power meters employ electrical and mechanical components including disks, gears, indicators, and dials to implement operation. Such meters are limited in accuracy, and they require frequent calibration and service by technicians to ensure their proper operation.
Electronic meters have recently begun to replace electromechanical meters in monitoring power consumption for homes and businesses. In general, because they rely on digital rather than electromechanical components, electric meters are more accurate and reliable than their counterpart electromechanical meters. Additionally, through networking, electric meters allow calibration and monitoring check-ups to be performed from a remote location such as a central office thereby greatly reducing the on-site visits by field service technicians. Finally, due to the deregulation of the electricity market already underway in the United States and Europe, broader range of information on consumers' power use is needed by competing power suppliers for customizing the billing and servicing plan for each consumer. Due to these advantages, in the near future, digital meters may replace many of million electromechanical power meters that are in use today in industrial and residential applications.
A common feature in electronic (digital) power meters is energy-to-pulse conversion (E2P) wherein the frequency (i.e., number of signal pulses per second) generated is proportional to the power consumption. Accordingly, the energy consumption can be determined by monitoring the number of pulses generated. Such conversion is generally performed using an analog-to-digital converter (ADC). Typically, in any ADC, a number of clock cycles are required to process and produce one conversion result. For example, a conversion (e.g., from voltage or current into a digital value) rate of 4 KHz may be expected from a clock rate of 1 MHz. It is desirable to improve the output frequency range making the system applicable to a wider range of applications and allowing for more accurate measurements in less time. A low conversion rate is generally undesirable because it limits the range of applications and requires more time for an accurate measurement. An improved range may be desirable because it provides the flexibility to accommodate the different requirements of different power meter Original Equipment Manufacturers (OEM) such as Schlumberger, General Electric, Siemens, etc. all at once. A power meter OEM may want a high frequency to allow for fast calibration. Another power meter OEM may want a slow frequency to drive a stepper motor to turn an indicator to show energy consumption which cannot operate at high frequencies.
FIG. 1
illustrates the steps in a traditional E2P conversion technique. In step
105
, voltage (V) and current (I) measurements are first converted into digital values. Next, the total consumed energy (E) is updated (step
110
). This is accomplished by adding the current energy consumption E to the power calculation (P=V*I). The updated energy consumption E is then compared against an energy threshold (T) whose value determines the frequency range (step
115
). In general, the threshold value is inversely correlated to the E2P frequency which means that the higher the threshold, the lower the E2P frequency, and vice versa. If the energy consumption E reaches the threshold T, a single pulse representing the energy threshold T is output (step
120
). Next, the energy consumption E is again updated by subtracting a value equal to the energy threshold T from the present energy consumption E (step
125
). Step
105
is then repeated to add a new P value (with new V and I conversions) to the present energy consumption E and the process continues. Otherwise, if the energy consumption E has yet to reach the threshold T, step
105
is repeated to add a new P value (with new V and I conversions) to the present energy consumption E and the process continues.
Using this technique, there is at most one pulse produced per power P calculation. Accordingly, if the voltage and current conversion rates are at 4 KHz as discussed in the earlier example, the output pulse frequency is limited to at most 4 KHz. However, it may be desirable to increase the E2P output pulse counts per P calculation (i.e., per clock cycle) over that of the traditional technique to improve the range of output frequency thereby allowing a wider range of applications. Having the ability to output pulses at a greater rate than the conversion rate also affords more accurate measurements in less time.
In U.S. Pat. No. 5,760,617 issued to Coln et al., an interpolator is implemented between an ADC and a digital-to-frequency converter to increase the sampling rate of the digital words generated by the ADC prior to providing the digital words to the digital-to-frequency converter. The interpolator increases the sampling rate from a first clock rate f
1
to a second clock rate f
2
. Accordingly, such interpolation may be used to improve the accuracy of the analog-to-digital conversion. Furthermore, the interpolation process may increase the digital-to-frequency's output pulse counts since virtual data points are added between two actual conversion data points from the ADC. However, an interpolator may be a rather complex and expensive piece of hardware, especially for high-order interpolation.
For industrial power distribution, some electric/power utilities may utilize a three-wire system, each carrying a signal with a different phase, for the purpose of power efficiency. Information from these three wires may be converted into pulse counts and then simply combined to provide the total power consumption. There is a potential of information overlap. More particularly, the pulses of the signals from the three wires may completely overlap each other (e.g., received concurrently) thereby causing a potential loss of information when they are combined unless the data from the three signals are properly separated. To separate the three streams of data from the three wires, a rather complex interface circuit has traditionally been used. The three streams of data are subsequently provided as input to a micro-controller to sum up the total pulse counts which represent the total energy consumption. Such traditional approach required complex hardware (e.g., interface circuit and micro-controller) and is therefore costly to implement.
Thus, a need exists for an apparatus, system, and method to increase the E2P output pulse counts per P calculation (i.e., per clock cycle) to improve the range of output frequency without added complex and expensive hardware. A need also exists to eliminate the potential information loss in multiple-wire or multi-phase power distribution systems without added complex hardware.
SUMMARY OF THE INVENTION
According to the present invention, the E2P output pulse counts per P calculation (per clock cycle) is increased, to improve the range of output frequency and to eliminate potential information loss in a multiple-wire and multiple-phase power distribution system, without requiring additional complex hardware.
The present invention meets the above needs with an energy-to-pulse converter. The energy-to-pulse converter comprises: a computation engine coupled to the first ADC and the second ADC and a converter circuit coupled to the computation engine. The computation engine is clocked at a first clock frequency F
1
. The computation engine computes a power P value from a first plurality of bits representing current and a second plu

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