Encryption/decryption system for calculating effective lower...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07403965

ABSTRACT:
An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND, the parameter ND satisfying R×R−1−N×ND=1 for an integer N and a radix R that is coprime to and greater than N, with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.

REFERENCES:
patent: 2003/0208518 (2003-11-01), Gura et al.
patent: 2004/0167952 (2004-08-01), Gueron et al.
patent: 2002-207589 (2002-07-01), None
Peter L. Montgomery, “Modular Multiplication Without Trial Division,” Mathematics of Computation, vol. 44, No. 170, Apr. 1985, pp. 519-521.
z,701 etin Kaya Koç, “High-Speed RSA Implementation,” RSA Laboratories, RSA Data Security, Inc., Version 2.0, Nov. 1994, pp. 48-49.

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