Encoding method for T1 line format for CCITT 32k bit per second

Details Encoding method for T1 line format for CCITT 32k bit per second Encoding method for T1 line format for CCITT 32k bit per second

1986-09-02

1988-05-03

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

455608, H04B 1404

Patent

active

047425318

ABSTRACT:
The present method is an encoding scheme for suppressing excessive amount of zeroes transmitted via a T1 line facility. Clear channel transmission capability is provided by this scheme for 32 kb/s or 64 kb/s transmission channels. This scheme provides the proper zero bit suppression for alternating mark inversion signaling (AMI). A proper AMI signal contains no more than 15 consecutive zero bit positions. In addition to meeting the AMI signaling standards, this scheme does not induce any violations of VMR (violation monitor and removal) equipment. Thus, this scheme is transparent to existing line equipment and error monitoring equipment. This scheme provides both a necessary and sufficient method for achieving the AMI signaling requirements during clear channel signaling.

REFERENCES:
patent: 4027152 (1977-05-01), Brown et al.
patent: 4262309 (1981-04-01), Yamaguchi et al.
patent: 4347617 (1982-08-01), Murano et al.
patent: 4502143 (1985-02-01), Kato et al.

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