Encoding for error correction of recorded digital signals

Details Encoding for error correction of recorded digital signals Encoding for error correction of recorded digital signals

1977-12-15

1980-06-03

Atkinson, Charles E.

Excavating

360 38, G06F 1112, G11B 500

Patent

active

042064406

ABSTRACT:
Digital signals consisting of sets of simultaneous bits have an error-correcting signal encoded into them by adding an error-correcting bit to each set. The sets thus enlarged are referred to as digital words. The digital signals are then converted from simultaneous, or parallel, form to serial, or sequential, form and the digital words from a block of several digital signals at a time are interleaved in such a way that corresponding words from each of the digital signals in the same block are placed in immediate sequence. Prior to adding the error-correcting bits error-detecting bits can be added to the original bits in intersecting sets can that intersect the first-mentioned sets in row by column relationship, and parity bits can also be formed simultaneously with the formation of the error-correcting bits as extensions of the intersecting sets. In decoding the resulting signals, changes in the bits forming one word of each digital signal can be directly corrected, and additional errors can be detected and minimized by forming mean value signals of digital signals that immediately precede and follow the erroneous digital signal or by retaining the preceding digital signal until the succeeding signals return to correct or correctable form.

REFERENCES:
patent: 3465287 (1969-09-01), Kennedy et al.
patent: 3798597 (1974-03-01), Frambs et al.
patent: 3988677 (1976-10-01), Fletcher et al.
patent: 4009469 (1977-02-01), Boudreau et al.
patent: 4030129 (1977-06-01), Whitlock
J. L. Ramsey, Realization of Optimum Interleavers, IEEE Transactions on Information Theory, vol. It-16, No. 3, May 1970, pp. 338-345.

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