Encoding apparatus for digital signal with improved block channe

Coded data generation or conversion – Digital code to digital code converters – To or from minimum d.c. level codes

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Details

341106, 341 68, H03M 700

Patent

active

053652312

ABSTRACT:
An encoder separates an input digital signal including m bits into the first group and the second group, and encodes each piece of data in the first group to a single code word including n bits in one-to-one correspondence and encodes each piece of data in the second group to two code words each including n bits in one-to-two correspondence. A CDS calculator calculates a CDS value for each of the words output from the encoder. A DSV calculator calculates the accumulated DSV value of the individual words output from the encoder. When the two-n-bit code words are output from the encoder, a code selector selects that one of the code words which decreases the next accumulated DSV value to be calculated by the DSV calculator, according to the CDS value from the CDS calculator and the accumulated DSV value from the DSV calculator. A margin bit generator generates a predetermined margin bit which decreases the next accumulated DSV value to be calculated by the DSV calculator, according to the CDS value from the CDS calculator and the accumulated DSV value from the DSV calculator, and inserts the margin bit in the single n-bit code word output from the encoder and the one code word selected by the code selector. A transfer section transfers the resulting n+1 bits.

REFERENCES:
patent: 4531153 (1985-07-01), Watanabe
patent: 4775985 (1988-10-01), Busby
patent: 4985700 (1991-01-01), Mikami
patent: 4988999 (1991-01-01), Uehara et al.
patent: 5192949 (1993-03-01), Suzuki et al.
patent: 5196848 (1993-03-01), Sakazaki
patent: 5198813 (1993-03-01), Isozaki

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