Coded data generation or conversion – Digital code to digital code converters – To or from minimum d.c. level codes
Reexamination Certificate
2000-11-10
2002-08-20
Jeanpierre, Peguy (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from minimum d.c. level codes
C341S059000
Reexamination Certificate
active
06437710
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a communication system comprising a network of interconnected transceivers, encoders and decoders. The encoders can produce a bitstream encoded at the same rate as the source data and, over time, incurs no DC accumulation. The encoded bitstream can be wrapped within a packet or frame with a preamble having a coding violation used not only to synchronize a decoder but also to detect transmission errors.
2. Description of the Related Art
Communication systems are generally well known as containing at least two nodes interconnected by a communication line. Each node may include both a transmitter and a receiver, generally referred to as a “transceiver.” The transceiver provides an interface between signals sent over a communication line and a digital system which operates upon that signal in the digital domain.
FIG. 1
illustrates a set of nodes
10
interconnected by one or more communication lines, to form a communication system or network
12
. The network topography or backbone can vary depending on its application. The signal transmitted across the network can contain instructions and/or data, which conceivably could be audio data, video data, or both and, therefore, the network can be considered a multi-media network. The transfer rate of multi-media signals may be generally quite high and may require a relatively high speed communication line, a suitable line being an optical fiber, for example.
If an optical fiber is used, then the receiver portion of the transceiver converts light energy to an electrical signal.
FIG. 2
illustrates a transmitter portion
14
of a transceiver linked by a communication line
16
to a receiver portion
18
of another transceiver. Transmitter
14
includes a light emitting diode (“LED”)
20
that converts electrical signals to optical or light energy forwarded across communication line
16
. At a node remote from transmitter
14
, receiver
18
includes a photosensor
22
.
The load capacitance of LED
20
may require a substantial amount of drive current from amplifier
24
. The higher the bit rate, the more current need be driven to LED
20
. Likewise, the higher the transmitted bit rate, the greater the electromagnetic (“EM”) radiation at both the transmitter
14
and receiver
18
.
The data transmitted across communication line
16
is generally encoded and placed within a packet or frame. A need exists for transferring data at a high bit rate; however, it is important that the overhead needed to encode that data be substantially minimized. In other words, if encoding were to add unnecessary transitions in the transferred data, then impermissibly high drive current is needed to more quickly transition LED
20
. The speed by which LED
20
can transition is limited by the capacity of components within transmitter
14
, and also the EM radiated by transmitter
14
.
FIG. 3
illustrates an incoming bitstream of source data, and the resulting encoding of that source data. Encoding is shown according to either a biphase code or a Miller code, both of which are fairly popular coding mechanisms. The source data maximum transmission rate (defined as the minimum source data cycle) is limited to two clock cycles. In other words, each high or low pulse of the source data is equal to or greater than one clock cycle. The biphase coding scheme, however, requires that for each logic high value of source data, a transition occurs at the middle as well as boundary regions of that clock phase. The biphase coding scheme thereby encodes the data rate at twice the source data rate whenever the source data encounters a logic high value. This significantly reduces the available bandwidth of the transmission line and, as described above, the current draw and EM radiation of the transmitter will significantly increase.
FIG. 3
also illustrates the Miller coding scheme. Miller coding has one distinct advantage over biphase coding in that the encoded data rate is not twice the source data rate. The Miller encoded data rate is designed to be the same as the source data rate to enhance the total available bandwidth of the transmission line and reduce the burdens upon the components of the transmitter and receiver. In Miller coding, a logic high value is encoded by a transition at the center or middle of a clock phase, while logic low voltage values are encoded by transitions at the boundary of a clock phase. The minimum distance between transitions of neighboring logic low and high voltage values is, however, maintained at one clock phase or clock cycle.
An unfortunate aspect of Miller coding is that the encoded bitstream incurs an accumulated DC value. As shown in
FIG. 3
, a logic low voltage value for the duration of one clock phase represents a negative DC value (“−1”), and a logic high voltage value during a clock phase represents a positive DC voltage value (“+1”). It is desirable that the accumulated DC voltage value be at the median between logic high and logic low voltage values. On line
26
, the cumulative DC voltage value, also know as the digital sum value (or “DSV”) is shown for the Miller coding. A transition at the middle of a clock cycle or phase represents no change in DC voltage value (“0”) thereby not adding to or taking away from the DSV. DSV indicates the Miller coding becomes more and more skewed towards the logic low voltage value, as indicated by a −3 DSV for the source data shown.
Referring to
FIGS. 2 and 3
in combination, a skewed DC value from a voltage at the midline between logic high and logic low voltage values (i.e., a DSV greater than or less than 0) will accumulate upon capacitor
28
and the input node of comparator
30
. Accumulation of a DC value or “offset” will cause what is known as baseline wander, which causes receiver
18
to detect an encoded signal which is dependent upon the bit sequence of that signal. Detection is no longer based on an ideal DC-free coding signal, but instead, wanders from the baseline or midline voltage value.
It would be beneficial to introduce an encoder and coding methodology that avoids coding at a higher rate than the incoming source data, but without introducing unduly large, cumulative DC voltage. The improved encoder is therefore one which produces minimal DC skew for relatively short periods of time, and over a more lengthy time period, produces no DC skew whatsoever. The desired DC skew can occur only for short durations which would advantageously be less than the RC time constant of resistor
32
and capacitor
28
, shown in
FIG. 2
as a low-pass filter at the input of comparator
30
. The desired encoder and encoding methodology can be used in any communication system employing transmitters and receivers and, while beneficially used in an optical transmission system, the improved encoder and methodology can be used to transmit signals over copper wire or through an air (optical or acoustic) medium, for example.
SUMMARY OF THE INVENTION
The problems outlined are in large part solved by an improved encoder, communication system, and methodology thereof. The communication system is one which can forward multi-media signals across airwaves, copper wire, and/or fiber optic cables. The coding mechanism is chosen to forward the coded bitstream at a rate not to exceed the source data, and the encoded data is substantially DC-free. In many instances, the times in which the encoded data is not DC-free can be relatively short, and assuredly shorter than the RC time constant of the receiver, regardless of the form of that receiver.
The DC-free encoded bitstream is henceforth referenced as a DC-adaptive bitstream or “DCA” bitstream. The encoded DCA bitstream is partially based on the DSV of the previous clock cycle, which is the cumulative DC value of the encoded DCA bitstream cumulative through the previous clock cycle. The DSV is guaranteed by the encoder to not exceed +1 or be less than −1, and therefore is always equal to +1, 0, or −1.
To encode, knowledge is needed of the cumu
Ho Horace C.
Knapp David J.
Mueller Rainer P.
Tam Pak Y.
Conley & Rose & Tayon P.C.
Daffer Kevin L.
Jeanpierre Peguy
Oasis Design Inc.
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