Encoder arrangement having preventive policing circuit (PPC) wit

Details Encoder arrangement having preventive policing circuit (PPC) wit Encoder arrangement having preventive policing circuit (PPC) wit

1992-08-27

1994-09-13

Shaw, Dale M.

G06F 1314

Patent

active

053476352

ABSTRACT:
Encoder arrangement including the cascade connection of a data source (VSS), an encoder circuit (ENC) and a buffer circuit (BUFC) which is part of a preventive policing circuit (PPC) adapted to reduce the data output rate of said buffer circuit when said output rate does not satisfy a predetermined probability distribution function (CCCP/CR) of said output rate. The PPC at the end of each measurement interval measures this data output rate, determines the interval (BRI) to which the measured data output rate belongs and generates an alarm signal (AL). Via a gating arrangement (AG, GC) the alarm signal controls the connection of a clock signal (CLO/3) with a reduced output rate to the read-out input (RO) of the buffer circuit (BUFC) when for the measured interval the cell rate has to be decreased.

REFERENCES:
patent: 4779267 (1988-10-01), Limb
patent: 4920534 (1990-04-01), Adelmann et al.
patent: 5134476 (1992-07-01), Aravind et al.
patent: 5159447 (1992-10-01), Hoskell et al.
patent: 5237660 (1993-08-01), Weber et al.
"Definition of a Universal ATM Video Coding Architecture" by W. Verbiest, et al, VISICOM 90, Workshop on Packet Video in Morristown, USA.
Electrical Communication. vol. 64, No. 2/3. 1990, Brussels BE pp. 186, 193; S. D'Agostino et al.: `Universal ATM Video Coding Architecture`, p. 188, right column, line 3-p. 189, left column, line 29; FIG.2*, *p. 191, left column, line 40-p. 192, right column, line 11; FIG. 5*.

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