Encoder and decoder using run-length-limited code

Details Encoder and decoder using run-length-limited code Encoder and decoder using run-length-limited code

2006-08-29

2006-08-29

Mai, Lam T. (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

To or from minimum d.c. level codes

C341S059000, C341S063000, C708S402000, C708S203000, C714S005110

Reexamination Certificate

active

07098818

ABSTRACT:
When a zero run, which violating G constraint of a run-length-limited (RLL) code, is detected from the data stored in a first input register1111and a second input register1112, bits before and after the zero run is transferred to a temporary register1150via a bus for zero run removal1130to be combined to each other. Thus, by effectively using the mechanism of bus transfer, a circuit can be simplified, thereby realizing a small circuit.

REFERENCES:
patent: 6564237 (2003-05-01), Ohashi et al.
patent: 6690308 (2004-02-01), Hayami
patent: 7028214 (2006-04-01), Takashi et al.
patent: 0 751 522 (1997-01-01), None
patent: 2004-117239 (2004-04-01), None
NN: “Rate 16/17 (0, 6/6) Code”; IBM Technical Disclosure Bulletin, IBM Corp, New York, vol. 31, No. 8; pp. 21-23; Jan. 1989.
Siegel et al.; “Modulation and Coding for Information Storage”; IEEE Communications Magazine, IEEE Service Center, Piscataway, NJ, vol. 20, No. 12; pp. 68-86; Dec. 1, 1991.

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