Encapsulation method and leadframe for leadless...

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With dam or vent for encapsulant

Reexamination Certificate

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C438S123000, C438S124000

Reexamination Certificate

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06856006

ABSTRACT:
An encapsulation technique for leadless semiconductor packages entails: (a) attaching a plurality of dice (411) to die pads in cavities (41-45, 51-55) of a leadframe, the cavities arranged in a matrix of columns and rows; (b) electrically connecting the dice to a plurality of conducting portions (412-414) of the leadframe; and (c) longitudinally injecting molding material into the cavities along the columns via a plurality of longitudinal gates (46-49, 56-59) of the leadframe to package the dice in the cavities, the longitudinal gates situated between the cavities along the columns.

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patent: 58-128745 (1983-08-01), None
patent: 2000-31180 (2000-01-01), None
Translation of JP 2000-31180 A, Jan. 28, 2000, 7 pages.

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