Synthetic resins or natural rubbers -- part of the class 520 ser – Synthetic resins – At least one aryl ring which is part of a fused or bridged...
Reexamination Certificate
1998-10-02
2001-04-03
Cain, Edward J. (Department: 1714)
Synthetic resins or natural rubbers -- part of the class 520 ser
Synthetic resins
At least one aryl ring which is part of a fused or bridged...
C524S493000
Reexamination Certificate
active
06211277
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an encapsulating material for an LOC structure semiconductor device and an LOC structure semiconductor device using the same.
With increasing integration rate of semiconductor chips in IC, LSI, etc., there are now trends toward larger chip sizes, and smaller and thinner semiconductor devices. At the same time, the semiconductor devices themselves, when they are to be mounted on substrates, are more often exposed to high temperatures such as 200° C. or higher for a short time, where the moisture contained in the encapsulating material is vaporized and the generated vapor pressure exerts the boundary between the encapsulating material and inserts such as chips, lead frames, etc. as a peeling stress, resulting in swelling or cracking of particularly thin semiconductor devices.
To prevent such swelling or cracking due to the peeling stress, attempts have been so far made to lower the viscosity (molecular weight) of epoxy resin and curing agents or improve the adhesiveness between the encapsulating material and the inserts or spheradize inorganic fillers, thereby increasing a packing density and decreasing a water absorption percentage, but have been found not satisfactory yet.
With the trends toward smaller semiconductor device and improving the solder heat resistance, the semiconductor device structure is now changing from the conventional structure of mounting a semiconductor chip onto a lead to the LOC (lead-on-chip) structure of mounting an inner lead onto a semiconductor chip.
However, the conventional procedure has such problems that coarser particles of filler in the encapsulating material fill a clearance (distance) between a semiconductor chip and an inner lead, and molding pressure, molding contraction and stresses such as thermal stress, etc. generated when the semiconductor device is to be mounted onto a substrate exert the semiconductor chip, resulting in damages to the passivation film or even to a diffusion layer in the worst case as a cause of electrical characteristics failures.
SUMMARY OF THE INVENTION
The present invention has been established in these current situations and an object of the present invention is to provide an encapsulating material having a distinguished solder heat resistance and free from electrical characteristics failure due to damages to a passivation film and a diffusion layer thereunder attributable to the filler and also to provide an LOC structure semiconductor device.
The present invention provides an encapsulating material for an LOC structure semiconductor device, which comprises an epoxy resin, a curing agent for the epoxy resin, a curing accelerator, and an inorganic filler, said filler having a particle size of 90% or less of a distance between an inner lead and a semiconductor chip in the LOC structure semiconductor in the case of the distance being 70 &mgr;m or more, or having a particle size of 95% or less of the distance between an inner lead and a semiconductor chip in the case of the distance being less than 70 &mgr;m, and the amount of said filler being 80 to 95% by weight, based on the total weight of the encapsulating material.
The present invention also provides a semiconductor device and an inner lead provided on the semiconductor chip and fixed thereon by an LOC tape, the entirety being encapsulated with said encapsulating material.
REFERENCES:
patent: 5759875 (1998-06-01), Ahmad
patent: 8-255854 (1996-10-01), None
Fujii Masanobu
Kashihara Takaki
Kawata Tatsuo
Nara Naoki
Sakai Hiroyuki
Antonelli Terry Stout & Kraus LLP
Cain Edward J.
Hitachi Chemical Company Ltd.
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