Emulator apparatus and emulation method for efficiently analyzin

Details Emulator apparatus and emulation method for efficiently analyzin Emulator apparatus and emulation method for efficiently analyzin

1997-08-04

1999-05-11

Kizou, Hassan

39518321, 39518401, G06F11/00

Patent

active

059037199

ABSTRACT:
An emulation apparatus is connected to a host computer and a target system for verifying the operation of a program written for the target system. A microcomputer in the emulation apparatus executes the program written for the target system. In an undo mode, the execution of a program is halted at the end of the execution of each instruction. At that time, information on relative bus cycles is stored in a relative-bus cycle area of a memory. The contents of data and control registers in a target system are acquired and stored in data-register and control-register areas.

REFERENCES:
patent: 5608867 (1997-03-01), Ishihara
patent: 5689636 (1997-11-01), Kleber et al.
patent: 5758059 (1998-05-01), Alexander

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