Data processing: structural design – modeling – simulation – and em – Emulation – Of instruction
Reexamination Certificate
2006-09-05
2006-09-05
Phan, Thai (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Emulation
Of instruction
C703S027000, C711S138000, C712S028000
Reexamination Certificate
active
07103528
ABSTRACT:
A method for enabling access to a resource shared by at least two processors over a bus that supports an atomic instruction, wherein a first processor does not support the atomic instruction, the method comprising the steps of providing an atomic instruction emulator coupled to the bus, the atomic instruction emulator including at least two register sets for implementing an atomic instruction; receiving by the emulator over the bus an emulation request from the first processor to perform the atomic instruction on the shared resource, the request including an address location; and performing by the emulator the atomic instruction for the processor using the data and the address location from the request.
REFERENCES:
patent: 6430657 (2002-08-01), Mittal et al.
patent: 6801986 (2004-10-01), Steely et al.
patent: 2002/0082822 (2002-06-01), Noyes
patent: 2003/0037223 (2003-02-01), Steely et al.
“A Simpler Solution: Peterson's Algorithm,” Person's Algorithm, 1981, pp. 1-2.
“Peterson Pseudo-Code,” Electric Sand, 2001, pp. 1.
McCaughey Thomas
Motyka Michael
LSI Logic Corporation
Phan Thai
Strategic Patent Group Inc.
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