Emitter function logic flip-flop circuit

Details Emitter function logic flip-flop circuit Emitter function logic flip-flop circuit

1980-09-29

1982-09-14

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307289, 307299A, 307455, H03K 3289, H03K 19086

Patent

active

043497535

ABSTRACT:
An EFL J-K flip-flop circuit is provided in which feedback of only the true output Q of the slave latch to the input of the master section is required. The circuit in one embodiment includes a slave D-type latch comprising an EFL latch circuit combined with a one level current steering network, a master section comprising an EFL latch circuit combined with a two level current steering network, and an ECL inverter for complementing the K input signal to provide a K signal for the master section. All input combinational logic in the master section, including the complementing of the Q feedback signal, takes place in one emitter coupled transistor pair in the second level of the current steering network and at two input emitters of the master section EFL latch circuit. In an alternative embodiment, the ECL inverter is replaced by a third level current switch in the master section. Additional second level current switches may be added to the master and slave sections to provide the flip-flop circuit with asynchronous set and clear functions.

REFERENCES:
patent: 4145623 (1979-03-01), Doucette

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