Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1992-01-22
1993-01-26
Howell, Janice A.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307446, 307448, 307450, H03K 1908
Patent
active
051824736
ABSTRACT:
Logic unit cells are disclosed, consisting of an array of high speed logic gates, the outputs of which are wired together and coupled to a low power driver. High speed and switching rates are achieved by using very fast logic gates which have no gain and make use of a wired logic function in order to effect two levels of logic without adding the propagation delay through another logic gate. These arrays of logic gates are coupled to drivers which restore logic levels and provide the necessary power for driving interconnect capacitances while consuming and dissipating a minimum of power in the process. Another logic circuit discloses an array of logic gates as inputs to another logic gate, the individual gates consisting of gallium arsenide components and having drivers built into the output stage of each gate.
REFERENCES:
patent: 3448288 (1969-06-01), Allmark
patent: 4112314 (1978-09-01), Gani et al.
patent: 4423339 (1983-12-01), Seelbach et al.
patent: 4598213 (1986-07-01), Marley et al.
patent: 4641047 (1987-02-01), Birrittella
patent: 4663543 (1987-05-01), Sitch
patent: 4680486 (1987-07-01), Price et al.
patent: 4703203 (1987-10-01), Gallup et al.
patent: 4724342 (1988-02-01), Sato et al.
patent: 4725743 (1988-02-01), Anderson
patent: 4755695 (1988-07-01), Suzuki
patent: 4798979 (1989-01-01), Lee et al.
patent: 4801826 (1989-01-01), Cornelissen
patent: 4831284 (1989-05-01), Anderson et al.
patent: 4833349 (1989-05-01), Liu et al.
patent: 4906871 (1990-03-01), Iida
patent: 4922135 (1990-05-01), Mollier et al.
patent: 4931669 (1990-06-01), Higashisaka
patent: 4937474 (1990-06-01), Sitch
patent: 4940908 (1990-07-01), Tran
patent: 4943740 (1990-07-01), Gulczynski
patent: 4945258 (1990-07-01), Picard et al.
patent: 4965863 (1990-10-01), Cray
patent: 4968904 (1990-11-01), Yamashita et al.
Hodges & Jackson, Analysis and Design of Digital Integrated Circuits, 422-427 (1988) (2nd Ed.).
Birrittella Mark S.
Kiefer David
Smetana Stephen B.
Swanson Vernon W.
Wikstrom Jan A.
Cray Research Inc.
Howell Janice A.
Ouellette Scott A.
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