Emitter-coupled logic circuit with three-state capability

Details Emitter-coupled logic circuit with three-state capability Emitter-coupled logic circuit with three-state capability

1987-12-15

1989-07-18

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307473, 307475, H03K 19086

Patent

active

048496596

ABSTRACT:
An ECL circuit (30.sub.1) formed with a pair of emmitter-coupled bipolar transistors (Q1.sub.A and Q1.sub.B), a main current source (26), a resistor (R1.sub.A), and an output transistor (Q2) contains a switching stage (38) for placing the circuit in the three-state mode when the circuit is operated in the normal ECL output voltage range. The switching stage causes current exceeding that supplied by the current source to flow through the resistor. The output transistor turns off, enabling the circuit to exhibit high output impedance.

REFERENCES:
patent: Re29982 (1979-05-01), Aoki
patent: 3630990 (1987-01-01), Buscaglia et al.
patent: 3758791 (1973-09-01), Taniguchi et al.
patent: 4490630 (1984-12-01), Freeman
patent: 4682058 (1987-07-01), Gal
patent: 4751406 (1988-06-01), Wilson
Gustafson et al, "ECL Enhances Proven Parallel Architecture," Northcon/85, 22-24, Oct. 1985, pp. 1-13.
Signetics ECL 10 K/100 K Data Manual 1986, Signetics Corp., Mar. 1986, pp. 4-3-4-5, 4-12, 6-227, 6-228, 7-58, and 7-59.

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