Emitter coupled logic circuit having an active pull-down output

Details Emitter coupled logic circuit having an active pull-down output Emitter coupled logic circuit having an active pull-down output

1990-02-26

1991-03-26

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307570, H03K 1901, H03K 1708

Patent

active

050031996

ABSTRACT:
An ECL circuit having an output circuit with improved pull-down characteristics. An active pull-down circuit is provided by a p-channel JFET which includes a back gate connection or a merged p-channel JFET/NPN device. The gate and/or back gate are switched, providing a lowering of the device impedance during switching of the device from pull-up to pull-down operation, resulting in an improved pull-down speed.

REFERENCES:
patent: 4547686 (1985-10-01), Chen
patent: 4713560 (1987-12-01), Herndon
patent: 4847522 (1989-07-01), Fuller et al.

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