Embedding resin

Stock material or miscellaneous articles – Composite – Of epoxy ether

Reexamination Certificate

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C428S414000, C428S418000, C438S748000, C361S748000, C361S820000, C361S821000, C361S830000, C257S793000, C257S795000, C257S796000, C523S400000, C524S495000, C524S789000

Reexamination Certificate

active

06680123

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an embedding resin used for embedding, into a wiring board, electronic parts such as chip capacitors, chip inductors, and chip resistors, and more particularly, to an embedding resin suitable for use in, for example, a multi-layer wiring board in which electronic parts are to be embedded, or a package for storing a semiconductor element.
2. Discussion of the Related Art
In recent years, various studies have been performed on multi chip modules (MCMs) in which a number of semiconductor elements are mounted on a build-up wiring board. Typically, by use of solder, electronic parts, such as chip capacitors, chip inductors, and chip resistors, are mounted on the surface of a wiring layer formed on the surface of the wiring board.
When electronic parts are mounted on the surface of the build-up wiring board, since the parts require predetermined regions for mounting, a limitation is imposed on miniaturization of the wiring board. Also, depending on the layout of wiring for surface mounting, parasitic inductance of the wiring, which is an undesirable property, becomes large, which hampers incorporation of such wiring boards into electronic devices of higher frequency.
In order to solve the aforementioned problems, various studies have been performed on the method for embedding electronic parts in a wiring board. Japanese Patent Application Laid-Open (kokai) No. 11-126978 discloses a method in which electronic parts are mounted by use of solder, in advance, on a wiring board having a transfer sheet formed from metallic foil, and then the parts are transferred. However, this method does not provide accuracy in positioning of the mounted parts.
Japanese Patent Application Laid-Open (kokai) No. 2000-124352 discloses a multi-layer wiring board in which an insulating layer is built up on electronic parts embedded on a core substrate. When electronic parts are embedded in a substrate such as a core substrate, a space between the substrate and the electronic parts is filled with an embedding resin, and an insulating layer and a wiring layer are built up on the substrate. The electrode of the electronic part thus, must be electrically connected to the wiring formed on the insulating layer, through a metalization technique such as electroless plating.
The embedding resin is desirably colored black in order to prevent random reflection of light, which would otherwise raise problems when a wiring pattern is formed on the built-up insulating layer through exposure and development, or to reduce non-uniformity in color of the resin during curing of the resin. Therefore, carbon or a similar material must be incorporated, as a coloring agent, into the resin.
However, when carbon, which is conductive, is excessively incorporated into the embedding resin, the insulating property of the resin is deteriorated. Therefore, it is important to design the method for coloring the resin black so that random reflection of light is prevented and non-uniformity in color of the resin is reduced during curing of the resin, with the insulating property between electronic parts or between wiring portions formed on the insulating layer being maintained.
A problem arises when a wiring board is used under high-frequency conditions in that there is loss of electrical signals in high-frequency regions. In order to reduce such loss of electrical signals, an embedding resin used for embedding electronic parts in the wiring board must have low dielectric constant and exhibit low dielectric loss.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to an embedding resin that substantially obviates one or more of the problems due to the limitations and disadvantages of the related art.
An object of the present invention is to provide an embedding resin which attains a high mounting density of electronic parts included in a wiring board.
Another object of the present invention is to provide an embedding resin which exhibits excellent electrical properties, such as insulating property.
Yet another object of the present invention is to provide an embedding resin which prevents random reflection of light.
Yet another object of the present invention is to provide an embedding resin which reduces non-uniformity in color of the resin during curing thereof.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the embedding resin embeds an electronic part in an object, the embedding resin having a dielectric constant of about 5 or less and tan &dgr; of about 0.08 or less.
In another aspect, a wiring board in which electronic parts are embedded by use of an embedding resin includes a through hole formed on a core substrate; a backing tape applied on the core substrate; a plurality of capacitors mounted on an adhesive surface of the backing tape, wherein the embedding resin is fed into spaces between the through hole and the plurality of capacitors.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 3933666 (1976-01-01), Yoneno et al.
patent: 4600766 (1986-07-01), Arita et al.
patent: 5951908 (1999-09-01), Cui et al.
patent: 6146749 (2000-11-01), Miyamoto et al.
patent: 6376053 (2002-04-01), Nakamura et al.
patent: 2003/0045757 (2003-03-01), Ishii et al.
patent: 4-356998 (1992-12-01), None
patent: 6-326472 (1994-11-01), None
patent: 7-263619 (1995-10-01), None
patent: 11-45955 (1999-02-01), None
patent: 11-54939 (1999-02-01), None
patent: 11-67961 (1999-03-01), None
patent: 11-74648 (1999-03-01), None
patent: 11-126978 (1999-05-01), None
patent: 11-307687 (1999-11-01), None
patent: 2000-124352 (2000-04-01), None

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